Digital Signal Processing Using High Speed Low Power Tolerant Adder

Authors:

Preeti Arora (Manav Rachna International School, Gurgaon)

Keywords: Approximate adder, Low Power ,DSP application, tolerant adder.

Abstract:

Low power is an essential requirement to process various signal processing algorithm and architecture used for portable multimedia device. In modern VLSI technology the occurrence of all kind of error has became ineluctable. The useful information gathered by human being for multimedia application has some faulty output. Therefore there is no need to produce exactly correct numerical output. Previous research in context is based on the considering tradeoff between power and speed. The concept of error tolerance compromises with correctness, a large reduction in power consumption and improvement in speed can be achieved. In this paper the tolerant adders used for digital signal processing. The world accepts “analog computation,” which generates “good enough” results rather than totally accurate results [1]. The data processed by many digital systems may already contain errors.

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